Discrete and Continuous Models for the Performance of Multi-stage Systems in the Presence of Faulty Components

In this paper we analyze the performance of multi-processor systems with a multi-stage interconnection network in the presence of faulty components. Models for estimating the system performance, as measured by its bandwidth and processing power, are developed for two different modes of operation. In the first mode, the operation of the system is fully synchronized and all processors which need memory access issue their requests simultaneously. In the second, each processor is allowed to issue its request a t any time instant. For each of the two modes of operation, two models are presented providing lower and upper estimates for the bandwidth of multi-stage systems. The expected degradation in the performance of the system (in the presence of faulty components) predicted by these two models is then compared' to simulation results.